EE1-09 Introduction to Computer Architecture and SystemsLecturer(s): Dr Tom Clarke; Dr Yiannis Demiris
To provide a basic introduction to:
a) Computer architecture and assembly language programming
b) Operating systems
At the end of the course, students should know: how computers work; how to evaluate their performance; the instruction set architecture of a typical modern RISC processor; ARM processor architecture; relationship between hardware and software
The kernel of computer architecture: the instruction set architecture. Trends in technology and the basics of a computer system architecture.
Introduction to processor design: the MU0 architecture.
Pitfalls with MU0, the advantages of different instruction formats, an introduction look at the ARM processor.
The basics of assembly language programming. Arithmetic instructions, data transfer instructions, pre-and post-index addressing.
Further assembly language programming. Conditional execution and the ARM's S-bit. Shifted operands and shift types, multiply instructions, multiplication through shift-and-add, some simple complete ARM programs.
Stacks and subroutines. The concept of a stack and its implementation in the ARM, the use of a link register, nested subroutines.
The architecture of the ARM. An introduction to pipelining.
Instruction encoding. ARM encoding of data processing and data transfer instructions.
Memory hierarchies. The principles of locality, unified versus separate instruction and data caches. Direct-mapped caches: design issues and architecture, cache write strategies
Exceptions and interrupts, ARM's shadow registers.
An introduction to I/O interfaces. Polling, interrupt-drive I/O and DMA.
2. OPERATING SYSTEMS
Introduction: what is an operating system and what services it provides to users. Examples of operating systems (including desktop, server and embedded OS). Evolution of operating systems; batch systems, multiprogramming, timesharing. Multiprocessor and distributed system, real time OS. Criteria for OS design.
Operating system structures: operating system services and components; system calls; hardware support for OS (memory protection, timers, privileged and user modes of operation); organization of OS: monolithic and layered systems; virtual machines; client-server models and microkernels.
b) Process management
Fundamentals: Processes, process states, process control blocks, process tables; two-, five- and seven-state models of process management; scheduling queues and queuing diagrams; process creation, termination and switch; introduction to threads: advantages, user and kernel level threads.
Process scheduling: schedulers and interrupts, preemptive and non-preemptive scheduling; priority and non-priority based schedulers; short-term scheduling criteria; scheduling algorithm: first-come-first-served, shortest remaining job first, round robin, priority scheduling, multilevel queue scheduling with/without feedback.
c) Interprocess communication and synchronization
Fundamentals: independent and co-operating processes; shared memory and message passing, race conditions, critical regions, mutual exclusion; locks, turn variables, Peterson?s solution to mutual exclusion; hardware assisted mutual exclusion; Semaphores: basics, associated data structures, implementation; use of semaphores for process co-ordiantion and mutual exclusion.
Synchronisation and deadlocks: semaphore solutions to classic synchronization problems: producer-consumer, readers-writers, dining-philosophers. Deadlocks: definition, examples. Necessary conditions for deadlocks. Deadlock modeling, OS strategies for dealing with deadlocks; deadlock detection and recovery, deadlock avoidance, deadlock prevention.d) Memory management
From program to running process: tools and address binding; compilers, assemblers, linkers and loaders. Logical vs physical address space. Memory protection, base/relocation and limit registers; Memory allocation: fixed versus dynamic partitioning, memory allocation algorithms. Internal and external fragmentation, compaction, paging, segmentation and virtual memory.
2.5-hour examination in June
Coursework contribution: 0%
Term: Autumn & Spring
Closed or Open Book (end of year exam): Open
Non-assessed problem sheets
Oral Exam Required (as final assessment): no
Prerequisite: None required
Course Homepage: https://intranet.ee.ic.ac.uk/t.clarke/arch/